1. Field of the Invention
The invention relates to a semiconductor device including an insulating film having a high dielectric constant and a method of fabricating the same, and more particularly to MOSFET (Metal Oxide Semiconductor Field Effect Transistor) accomplishing high performances and high reliability.
2. Description of the Related Art
In the development of a CMOS (Complementary MOS) device having a transistor which is as small as possible, there are problems of reduction in a drive current due to depletion of a poly-silicon (poly-Si) electrode, and increase in a gate leak current due to reduction in a thickness of a gate insulating film. Hence, there is studied combined technology for avoiding depletion of a poly-silicon electrode through the use of a metal gate electrode, and further for reducing a gate leak current by composing a gate insulating film of a material having a high dielectric constant to thereby physically thicken a gate insulating film.
As a material of which a metal gate electrode is to be composed, there are pure metal, metal nitride and silicide. Whichever material is used, it is required to be able to set a threshold voltage (Vth) to be an appropriate voltage in both n-type and p-type MOSFETs.
In order to accomplish a threshold voltage (Vth) equal to or smaller than ±0.5 eV in CMOSFET, it would be necessary to compose a gate electrode of a material having a work function equal to or smaller than a mid-gap (4.6 eV) of silicon (Si) or preferably equal to or smaller than 4.4 eV in n-type MOSFET, or a material having a work function equal to or greater than a mid-gap (4.6 eV) of silicon (Si) or preferably equal to or greater than 4.8 eV in p-type MOSFET.
To this end, there has been suggested a method of controlling a threshold voltage (Vth) in CMOSFET by composing gate electrodes of metals or alloys having different work functions from one another in n-type and p-type MOSFETs. Such a method is generally called “dual metal gate”.
For instance, the non-patent reference 1 sets forth that tantalum (Ta) and ruthenium (Ru) formed on silicon dioxide (SiO2) have work functions of 4.15 eV and 4.95 eV, respectively, and it is possible to modulate a work function by 0.8 eV between gate electrodes composed of these two metals.
A silicide electrode comprising a poly-Si electrode completely turned into silicide with nickel (Ni), hafnium (Hf) or tungsten (W) recently draws attention.
For instance, FIG. 1 is a cross-sectional view of a CMOS transistor suggested in the non-patent references 2 and 3.
A CMOS transistor illustrated in FIG. 1 includes a silicon substrate 1, and a device isolation film 2 formed at a surface of and in the silicon substrate 1. Each of regions sandwiched between the device isolation films 2 disposed adjacent to each other defines an area in which a transistor is to be fabricated.
As illustrated in FIG. 1, an n-type MOSFET and a p-type MOSFET are fabricated in the areas. Each of the n-type and p-type MOSFETs is comprised of a gate insulating film 3 formed on the silicon substrate 1, a gate electrode 23, 24 formed on the gate insulating film 3, a gate sidewall 7 surrounding a sidewall of the gate electrode 23, 24 therewith, an interlayer insulating film 11 surrounding the gate sidewall 7 therewith and formed on the silicon substrate 1, a silicide layer 10 formed around the gate sidewall 7 at a surface of the silicon substrate 1, an extended diffusion region 6 formed around the gate electrode 23, 24 in the silicon substrate 1, and source/drain diffusion layers 8 formed around the gate sidewall 7 and below the extended diffusion region 6 in the silicon substrate 1.
The gate insulating film 3 is composed of silicon dioxide (SiO2). The gate electrode 23 of the n-type MOSFET is composed of nickel silicide (NiSi) formed by turning poly-silicon completely into silicide with nickel (Ni), and introducing phosphorus (P) into the silicide as an impurity. The gate electrode 24 of the p-type MOSFET is composed of nickel silicide (NiSi) formed by turning poly-silicon completely into silicide with nickel (Ni), and introducing boron (B) into the silicide as an impurity.
It is said in the non-patent references 2 and 3 that it is possible to modulate a work function of a gate electrode by 0.5 eV at greatest by using the above-mentioned gate insulating film 3 and gate electrodes 23, 24. The process suggested in the non-patent references 2 and 3 is characterized in that it is possible to turn a poly-silicon electrode into silicide after impurities included in source/drain diffusion regions in CMOS are annealed for activation, ensuring that the process matches well with a conventional CMOS process.
The non-patent references 2 and 3 disclose that if a gate insulating film is composed of SiON, NiSi and NiSi2 of which gate electrodes are composed have work functions of about 4.6 eV and about 4.45 eV, respectively.
FIG. 2 is a cross-sectional view of a CMOS transistor suggested in the patent reference 1.
A CMOS transistor illustrated in FIG. 2 is comprised of a silicon substrate 1, a device isolation film 2 formed at a surface of and in the silicon substrate 1 for defining areas in each of which a transistor is to be fabricated, a gate insulating film 28 formed on the silicon substrate 1, a gate electrode surrounded with the gate insulating film 28, a gate sidewall 29 surrounding a sidewall of the gate electrode therewith, an interlayer insulating film 11 surrounding the gate sidewall 29 therewith and formed on the silicon substrate 1, a silicide layer 10 formed around the gate sidewall 29 at a surface of the silicon substrate 1, an extended diffusion region 6 formed around the gate electrode in the silicon substrate 1, and source/drain diffusion layers 8 formed around the gate sidewall 29 and below the extended diffusion region 6 in the silicon substrate 1
The gate electrode of the n-type MOSFET is comprised of a tungsten film 27, and a tungsten silicide film 28 surrounding the tungsten film 27 therewith, and the gate electrode of the p-type MOSFET is comprised of a tungsten film 26, and a tungsten film 27 surrounding the tungsten film 26 therewith.
As mentioned above, in the CMOS transistor illustrated in FIG. 2, the gate electrodes are comprised of tungsten (W) and tungsten silicide in accordance with a gate substitution process. That is, in order to control threshold voltages (Vth) in the n-type and p-type MOSFETs, the gate electrodes thereof are composed of tungsten and tungsten silicide, respectively, or the composition of tungsten silicide is varied.
Specifically, a tungsten film or a tungsten silicide film are formed entirely on a substrate, and then, a silicon (Si) film and a tungsten film are formed on the tungsten film and the tungsten silicide film, respectively. Thereafter, a portion of the silicon film disposed on the tungsten film in the p-type MOSFET region and a portion of the tungsten film disposed on the tungsten silicide film in the n-type MOSFET region are removed. Then, the tungsten film and the silicon film are caused to react with each other by annealing or the tungsten silicide film and the tungsten film are caused to react with each other by annealing to thereby form the tungsten silicide electrode and the tungsten electrode in the n-type and p-type MOSFET regions, respectively, or vary the composition of the tungsten silicide for controlling a work function of the gate electrodes.
The above-mentioned patent and non-patent references are defined as follows.
Patent reference 1: Japanese Patent Application Publication No. 2003-258121
Non-patent reference 1: International electron devices meeting technical digest 2002, p. 359
Non-patent reference 2: International electron devices meeting technical digest 2002, p. 247
Non-patent reference 3: International electron devices meeting technical digest 2002, p. 315